Cover image for An assembly language introduction to computer architecture : using the Intel pentium
Title:
An assembly language introduction to computer architecture : using the Intel pentium
Author:
Miller, Karen, 1962-
Personal Author:
Publication Information:
New York : Oxford University Press, 1999.
Physical Description:
335 pages : illustrations ; 25 cm
General Note:
Includes index.
Language:
English
ISBN:
9780195123760
Format :
Book

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Library
Call Number
Material Type
Home Location
Status
Central Library QA76.9.A73 M55 1999 Adult Non-Fiction Central Closed Stacks
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Summary

Summary

Ideal for undergraduate courses in computer organization, assembly language programming, and computer architecture, An Assembly Language Introduction to Computer Architecture: Using the Intel Pentium introduces students to the fundamentals of computer architecture from a programmer'sperspective by teaching them assembly language, the interface between hardware and software. Designed for students in computer science and engineering who have taken one high-level language programming course, it uses a top-down approach, introducing an abstract (registerless) assembly languagefirst. This approach enables students to build on previous knowledge and allows them to write programs from the beginning of the course. Topics covered include basic computer organization, data representation, data structures, the assembly process, exception handling, and more. Examples are developedusing the very popular Intel Pentium architecture; however, the concepts covered are valid with any system. This accessible text is supplemented with a helpful website (http://www.cs.wisc.edu/~smoler/x86text.html) that contains macros to use with programming tools, lecture notes to accompany thetext, sample programs, and other useful items.


Author Notes

Karen Miller is at University of Wisconsin.


Table of Contents

Preface
1 Background and Introduction
1.1 Levels of Abstraction
1.2 From Program to Execution
1.3 A Brief History of Computer Development
1.4 The Intel iAPX Architecture
2 Computer Basics
2.1 The Pieces and Parts
2.2 Memory Operation
2.3 The Instruction Fetch and Execute Cycle
2.4 Performance
3 SASM--Simple Abstract Language
3.1 Assembly and Compilation
3.2 Variable Declaration
3.3 Arithmetic Operations
3.4 Control Structures
3.5 Communication with the User
3.6 A SASM Program
4 Number Systems
4.1 Numbers and Their Representation
4.2 Weighted Positional Notation
4.3 Transformations Between Radices
4.4 Representation of Noninteger Numbers
5 Data Representation
5.1 Numbers versus Their Representation
5.2 Representation of Integers
5.3 Characters
5.4 Floating Point Representation
5.5 A Little Extra On Complement Representation
6 Arithmetic and Logical Operations
6.1 Logical Operations
6.2 Shift Operations
6.3 Addition and Subtraction
6.4 Multiplication
6.5 Division
7 Floating Point Arithmetic
7.1 Hardware versus Software Calculations
7.2 Addition and Subtraction
7.3 Multiplication
7.4 Division
7.5 Advanced Topics
8 Data Structures
8.1 Memory as an Array
8.2 Arrays
8.3 Stacks
8.4 Queues
9 Using Registers for Efficiency
9.1 Instructions and Efficiency
9.2 Registers
9.3 Load/Store Architectures
9.4 Addressing Modes
10 The Pentium Architecture
10.1 Generalities
10.2 Registers
10.3 Memory Model
10.4 Addressing Modes
10.5 Instruction Set
10.6 Code Examples
11 Procedures
11.1 Procedure Call and Return Mechanisms
11.2 Dynamic Storage Allocation
11.3 Activation Records
11.4 Parameter Passing
11.5 Saving Registers
11.6 A Pentium Program That Uses Procedures
12 The Assembly Process
12.1 Where Assemblers Fit in, and What Assemblers Do
12.2 Machine Code Format and Code Generation
12.3 Linking and Loading
13 Input and Output
13.1 Typical I/O Devices
13.2 The Processor--I/O Interface
13.3 Direct Memory Access (DMA)
14 Interrupts and Exception Handling
14.1 The Mechanism
14.2 The Role of the Operating System
14.3 The Pentium Exception Mechanism
14.4 Advanced Issues in Exception Handling
15 Features for Architectural Performance
15.1 Mimimal Instruction Sets and Choices
15.2 Instruction Level Parallelism
15.3 Memory Hierarchies
16 Architecture in Perspective
16.1 What's All This about RISC?
16.2 The Single-Chip Constraint
16.3 The Motorola 68000 Family
16.4 The Cray-1
16.5 Mips Risc
16.6 Sparc
16.7 Alpha
17 Memory Management and Virtual MemoryBarton P. Miller
17.1 Basic Concept and Terms
17.2 Base and Bounds
17.3 Segmentation
17.4 Segmentation on the Pentium
17.5 Paging
17.6 Paging and Segmentation
17.7 Multilevel Paging
17.8 Page and Segment Attributes
Appendix A Reserved Word

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